Semiconductor manufacturing system and control method thereof

ABSTRACT

In a semiconductor manufacturing system, operations of a plurality of processing apparatuses are controlled so as to efficiently manufacture semiconductor devices. The semiconductor manufacturing system having at least one processing apparatus for applying a process to semiconductor substrates. A memory part ( 5 ) stores priority-level data which indicates a priority level of the process to be applied to each of the semiconductor substrates on an individual semiconductor substrate basis. A control part ( 3, 7 ) controls the processing apparatus to apply the process to a newly supplied one of the semiconductor substrates by determining an order of processing the newly supplied one of the semiconductor substrates being supplied to the processing apparatus based on a comparison of new priority-level data with the priority-level data stored in the memory part with respect to the semiconductor substrates of which process has been scheduled, the new priority-level data being supplied in response to the newly supplied one of the semiconductor substrates being supplied to the processing apparatus.

This is the National Stage of International Application No.PCT/JP01103846, which was filed in the English language on May 8, 2001,and designated the U.S.

TECHNICAL FIELD

The present invention relates to a semiconductor integrated circuitmanufacturing system and, more particularly, to a control method of asemiconductor integrated circuit manufacturing system and acomputer-readable recording medium, which stores programs for realizingthe control method of a semiconductor integrated circuit manufacturingsystem.

BACKGROUND ART

In a conventional semiconductor integrated circuit, a time spent on eachmanufacturing process is calculated manually. For example, a time when awafer is supplied to a process chamber and a time when the process forthe wafer is ended are recorded repeatedly, and a time taken for theprocess is roughly calculated based on the time of supply and the timeof ending the process.

Additionally, since it is not considered in the conventionalsemiconductor integrated circuit manufacturing apparatus to apply aspecial treatment when the apparatus malfunctions in the middle of theprocess and stops for a certain period of time, there is a problem inthat the manufacture of the semiconductor integrated circuitsundesirably runs behind the schedule.

It should be noted that it is suggested to provide a backup apparatus inthe manufacturing system so as to cope with a stop of the apparatus dueto an unexpected trouble. However, in such a case, there is a problemthat its cost performance is deteriorated because such a backupapparatus is expensive.

DISCLOSURE OF INVENTION

It is a general object of the present invention to provide an improvedand useful semiconductor manufacturing system in which theabove-mentioned problems are eliminated.

A more specific object of the present invention is to provide asemiconductor manufacturing system in which operations of a plurality ofprocessing apparatuses are controlled so as to efficiently manufacturesemiconductor devices.

Another object of the present invention is to provide acomputer-readable medium which stores programs to control operations ofa plurality of processing apparatuses so as to efficiently manufacturesemiconductor devices.

In order to achieve the above-mentioned objects, there is providedaccording to the present invention a semiconductor manufacturing systemhaving at least one processing apparatus for applying a process tosemiconductor substrates, characterized in that: a memory part storespriority-level data which indicates a priority level of the process tobe applied to each of the semiconductor substrates on an individualsemiconductor substrate basis; and a control part controls theprocessing apparatus to apply the process to a newly supplied one of thesemiconductor substrates by determining an order of processing the newlysupplied one of the semiconductor substrates being supplied to theprocessing apparatus based on a comparison of new priority-level datawith the priority-level data stored in the memory part with respect tothe semiconductor substrates of which process has been scheduled, thenew priority-level data being supplied in response to the newly suppliedone of the semiconductor substrates being supplied to the processingapparatus. Accordingly, the process of the semiconductor substrates canbe immediately started in an order determined according to the priorityprovided to each semiconductor substrate.

Additionally, the control part may calculate a time of ending theprocess being applied to the newly supplied one of the semiconductorsubstrates or a time of ending the process for all of the semiconductorsubstrates. Accordingly, measure for the time of ending the process canbe provided to the user.

In the semiconductor manufacturing system according to the presentinvention, the memory part may store information regarding kinds offailure possibly occurring in the processing apparatus and a repair timeneeded for repairing the processing apparatus in response to each kindof failure; and when a failure occurs in the processing apparatuses, thecontrol part may calculate the time of ending the process in accordancewith the repair time read from the memory part in response to a kind offailure designated by a user. Accordingly, the time of ending theprocess can be calculated with high accuracy.

Additionally, the control part may calculate, based on a simulation ofan operation of the processing apparatus, a time of supplying the newlysupplied one of the semiconductor substrates to the processing apparatusin response to a time of ending the process designated by a user so asto end the process applied to the newly supplied one of thesemiconductor substrates or all of the semiconductor substrates.Accordingly, the user can easily recognize the time to supply a newsemiconductor substrate.

Additionally, a plurality of the processing apparatuses may becontrolled by the control part; a monitoring part may monitors acondition of the process being performed by each of the processingapparatuses; and the control part may select one of the processingapparatuses which applies the process to the newly supplied one of thesemiconductor substrates in response to the condition of the processbeing performed by each of the processing apparatuses. Accordingly, thesemiconductor substrates can be processed by the processing parts whichare sequentially selected based on the priority and the condition of theprocess performed by the processing part.

In the above-mentioned semiconductor manufacturing system, themonitoring part may monitor a remaining time for each of the processingapparatuses, the remaining time being a time until the process currentlybeing applied is ended; and the control part may select one of theprocessing apparatuses which applies the process to the newly suppliedone of the semiconductor substrates in accordance with the remainingtime. Accordingly, a plurality of semiconductor substrates can beconsecutively processed.

The monitoring part may monitor a continuous operating time for each ofthe processing apparatuses; and the control part may select one of theprocessing apparatuses which applies the process to the newly suppliedone of the semiconductor substrates by referring to a failure occurringrate calculated for each of the processing apparatuses in accordancewith the continuous operating time. Alternatively, the monitoring partmay monitor a time remaining for performing a next periodic inspectionfor each of the processing apparatuses; and the control part may selectsone of the processing apparatuses which applies the process to the newlysupplied one of the semiconductor substrates in accordance with the timeremaining for performing the next periodic inspection. Accordingly, anefficient process of the semiconductor substrate can be positivelyachieved.

Additionally, there is provided according to another aspect of thepresent invention a control method of a semiconductor manufacturingsystem having a processing apparatus which applies a process tosemiconductor substrates, characterized by the steps of: storingpriority-level data which indicates a priority level of the process tobe applied to each of the semiconductor substrates on an individualsemiconductor substrate basis; determining an order of processing anewly supplied one of the semiconductor substrates being supplied to theprocessing apparatus based on a comparison of new priority-level datawith the priority-level data stored in the memory part with respect tothe semiconductor substrates of which process has been scheduled, thenew priority-level data being supplied in response to the newly suppliedone of the semiconductor substrates being supplied to the processingapparatus; and causing the processing apparatus to apply the process tothe newly supplied one of the semiconductor substrates.

Further, there is provided according to another aspect of the presentinvention a control method of a semiconductor manufacturing systemhaving a processing apparatus which applies a process to semiconductorsubstrates, characterized by the steps of: storing priority-level datawhich indicates a priority level of the process to be applied to each ofthe semiconductor substrates on an individual semiconductor substratebasis; monitoring a condition of the process in each of the processingapparatuses; determining an order of processing a newly supplied one ofthe semiconductor substrates being supplied to the processing apparatusbased on a comparison of new priority-level data with the priority-leveldata stored in the memory part with respect to the semiconductorsubstrates of which process has been scheduled, the new priority-leveldata being supplied in response to the newly supplied one of thesemiconductor substrates being supplied to the processing apparatus;selecting one of the processing apparatuses which applies the process tothe newly supplied one of the semiconductor substrates in accordancewith the condition of the process and the order of processing; andcausing the processing apparatus to apply the process to the newlysupplied one of the semiconductor substrates.

Additionally, there is provided according to another aspect of thepresent invention a computer-readable recording medium storing programcode for causing a computer to control a process applied tosemiconductor substrates, characterized by: first program code means forstoring priority-level data which indicates a priority level of theprocess to be applied to each of the semiconductor substrates on anindividual semiconductor substrate basis; second program code means forcomparing new priority-level data with the previous storedpriority-level data with respect to the semiconductor substrates ofwhich process has been scheduled, the new priority-level data beingsupplied in response to the newly supplied one of the semiconductorsubstrates being supplied to a processing apparatus; third program codemeans for determining an order of processing a newly supplied one of thesemiconductor substrates being supplied to the processing apparatus; andfourth program code means for causing the processing apparatus to applythe process to the newly supplied one of the semiconductor substrates.

In the computer-readable recording medium according to the presentinvention, fifth program code means may be provided for calculating atime of ending the process being applied to the newly supplied one ofthe semiconductor substrates or a time of ending the process for all ofthe semiconductor substrates. Additionally, the computer-readablerecording medium according to the present invention may be provided withsixth program code means for storing information regarding kinds offailure possibly occurring in the processing apparatus and a repair timeneeded for repairing the processing apparatus in response to each of thekinds of failure; and seventh program code means, when a failure occursin the processing apparatus, for calculating the time of ending theprocess in accordance with the repair time which is read in response toa kind of failure designated by a user.

Alternatively, the computer-readable recording medium according to thepresent invention may include fifth program code means for calculating,based on a simulation of an operation of the processing apparatus, atime of supplying the newly supplied one of the semiconductor substratesto the processing apparatus in response to a time of ending the processdesignated by a user so as to end the process applied to the newlysupplied one of the semiconductor substrates or all of the semiconductorsubstrates.

Additionally, there is provided according to another aspect of thepresent invention a computer-readable recording medium storing programcode for causing a computer to control a process applied tosemiconductor substrates by a plurality of processing apparatuses,characterized by: first program code means for storing priority-leveldata which indicates a priority level of the process to be applied toeach of the semiconductor substrates on an individual semiconductorsubstrate basis; second program code means for monitoring a condition ofthe process in each of the processing apparatuses; third program codemeans for comparing new priority-level data with the previously storedpriority-level data with respect to the semiconductor substrates ofwhich process has been scheduled, the new priority-level data beingsupplied in response to the newly supplied one of the semiconductorsubstrates to which the process is applied; fourth program code meansfor determining an order of processing the newly supplied one of thesemiconductor substrates being supplied to the processing apparatuses;fifth program code means for selecting one of the processing apparatuseswhich applies the process to the newly supplied one of the semiconductorsubstrates in accordance with the condition of the process; and sixthprogram code means for causing the selected one of the processingapparatuses to apply the process to the newly supplied one of thesemiconductor substrates.

The computer-readable recording medium according to the presentinvention may store seventh program code means for calculating a time ofending the process being applied to the newly supplied one of thesemiconductor substrates or a time of ending the process for all of thesemiconductor substrates. Additionally, the computer-readable recordingmedium according to the present invention may store eighth program codemeans for storing information regarding kinds of failure possiblyoccurring in the processing apparatus and a repair time needed forrepairing the processing apparatus in response to each of the kinds offailure; and ninth program code means, when a failure occurs in theprocessing apparatus, for calculating the time of ending the process inaccordance with the repair time which is read in response to a kind offailure designated by a user.

The computer-readable recording medium according to the presentinvention may store seventh program code means for calculating, based ona simulation of an operation of the processing apparatus, a time ofsupplying the newly supplied one of the semiconductor substrates to theprocessing apparatus in response to a time of ending the processdesignated by a user so as to end the process applied to the newlysupplied one of the semiconductor substrates or all of the semiconductorsubstrates.

Alternatively, the computer-readable recording medium according to thepresent invention may store seventh program code means for monitoring aremaining time for each of the processing apparatuses, the remainingtime being a time until the process currently being applied is ended;and eighth program code means for selecting one of the processingapparatuses which applies the process to the newly supplied one of thesemiconductor substrates in accordance with the remaining time.

The computer-readable recording medium according to the presentinvention may store seventh program code means for monitoring acontinuous operating time for each of the processing apparatuses; andeighth program code means for selecting one of the processingapparatuses which applies the process to the newly supplied one of thesemiconductor substrates by referring to a failure occurring ratecalculated for each of the processing apparatuses in accordance with thecontinuous operating time.

Additionally, the computer-readable recording medium may store seventhprogram code means for causing monitoring a time remaining forperforming a next periodic inspection for each of the processingapparatuses; and eighth program code means for selecting one of theprocessing apparatuses which applies the process to the newly suppliedone of the semiconductor substrates in accordance with the timeremaining for performing the next periodic inspection.

Other objects, features and advantages of the present invention willbecome more apparent from the following detailed description when readin conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a block diagram of a structure of a semiconductor integratedcircuit manufacturing system according to an embodiment of the presentinvention.

FIG. 2 is a first part of a flowchart of an operation of thesemiconductor integrated circuit manufacture system shown in FIG. 1.

FIG. 3 is a second part of a flow chart of the operation of thesemiconductor integrated circuit manufacturing system shown in FIG. 1.

FIG. 4 is a block diagram of a basic structure of a production controlsystem provided with a plurality of semiconductor integrated circuitmanufacturing systems shown in FIG. 1.

FIG. 5 is a first part of a flowchart of an operation of the productioncontrol system shown in FIG. 4.

FIG. 6 is a second part of the flowchart of the operation of theproduction control system shown in FIG. 4.

FIG. 7 is a third part of the flowchart of the operation of theproduction control system shown in FIG. 4.

FIG. 8 is an illustration of a computer constituting a part of thesemiconductor integrated circuit manufacturing shown in FIG. 1 or theproduction control system shown in FIG. 4.

BEST MODE FOR CARRYING OUT THE INVENTION

A description will now be given, with reference to the drawings, of anembodiment of the present invention. In the drawings, same parts aregiven the same reference numerals. Although the semiconductor integratedcircuit manufacturing system which manufactures semiconductor integratedcircuits on a wafer is explained in detail below, the present inventionis applicable also to a system which manufactures a liquid-crystaldisplay panel or the like.

FIG. 1 shows a structure of a semiconductor integrated circuitmanufacturing system according to an embodiment of the presentinvention. As shown in FIG. 1, the semiconductor integrated circuitmanufacturing system according to the present embodiment comprises aprocess control part 10, first to sixth processing parts 11-16,processing parts 17, a conveyance way 18, a conveyance orbit 19, drivers21 and the stocker 23. The process control part 10 contains the inputpart 1, the first control part 3, the memory part 5, and the secondcontrol part 7.

The first control part 3 provided in the process control part 10 isconnected to the input part 1. The memory part 5 is connected to thefirst control part 3. Additionally, the control part 7 is connected tothe first control part 3.

On the other hand, in the above-mentioned semiconductor integratedcircuit manufacturing system, the conveyance way 18, which has theconveyance orbit 19, is connected to a stocker 23. The first throughsixth processing parts 11-16 and the processing parts 17 are arranged onthe both sides of the conveyance way 18. Moreover, drivers 21 areprovided to the conveyance way 18 in accordance with a drive capabilityrequired when a wafer 25 is conveyed along the conveyance orbit 19.

The first to sixth processing parts 11-16 and the processing parts 17are connected to the second control part 7, respectively. Moreover, eachof the drivers 21 is connected to the first control part 3. In addition,in FIG. 1, illustration of the connection relation between the secondcontrol part 7 and each of the fourth through sixth processing parts14-16 and the processing parts 17 is omitted for the sake ofconvenience.

In the semiconductor integrated circuit manufacturing system having theabove-mentioned structure, the first through sixth processing parts11-16 and the processing part 17 perform the same process concurrentlyunder the same condition. Alternatively, the same process may beconcurrently performed under at least two or more different conditions,or two or more different processes may be concurrently performed, Whenthe processing parts 11-17 provided in the semiconductor integratedcircuit manufacturing system shown in FIG. 1 concurrently perform two ormore different processes, a complete semiconductor integrated circuitmanufacturing process can be executed by a single semiconductormanufacturing system. Such a system is called “mini-fab”. It should benoted that the first through sixth processing parts 11-16 and theprocessing parts 17 are explained below as an example as whatconcurrently perform the same process under the same condition.

Additionally, in the above-mentioned semiconductor integrated circuitmanufacturing system, each of the processing parts 11-17 may be directlyconnected to the first control part 3 by omitting the second controlpart 7 provided in the process control part 10. However, a descriptionwill be given below of a case in which the second control part 7 isprovided in the process control part 10.

A description will now be given of an operation of a semiconductorintegrated circuit manufacturing system having the above-mentionedstructure. First, a kind with respect to a type of semiconductorintegrated circuit formed on a wafer 25 and the priority of the processto be applied to the wafer are supplied to the input part 1 for eachwafer 25 which is carried in the stocker 23. Here, the inputted kind andthe priority are stored in the memory part 5 by the first control part 3by being related to each other as shown in the following table 1.

TABLE 1 Kind Priority A 3 B 3 C 3 D 2 E 3

In table 1, the “priority” is an index, which indicates the degree ofthe necessity of the process at an earlier stage to each wafer 25carried in the stocker 23. The “priority” is represented in three levelsof “1” to “3”. That is, the “priority” is set as “1”, which means anurgent mode, when the process to be applied to a new wafer carried inthe stocker 23 needs to be performed first by suspending the presenton-going process. The “priority” is set as “2”, which means the expressmode, when the process to be applied to a new wafer carried in thestocker 23 needs to be performed by top priority after completing thepresent on-going process. Furthermore, the “priority” is set as “3”,which means the regular mode, when the process to be applied to a newwafer carried in the stocker 23 can be performed after an execution ofthe process which had been reserved previously.

A description will now be given, with reference to a flowchart shown inFIG. 2, of an operation when a wafer 25, on which the semiconductorintegrated circuit of kind Z is to be formed under the above-mentionedsituation, is carried in the stocker 23.

First, the wafer 25 of kind Z is carried in the stocker 23 in step S1. Auser inputs the priority with respect to the wafer 25 to the input part1. Then, the first control part 3 judges, in step S2; whether thepriority input by the user is 1. If it is judged that the priority is 1,the routine proceeds to step S3. When it is judged that the priority isnot 1, the routine proceeds to step S10. It should be noted that thepriority input by the user is added to the table 1, as shown in thefollowing table 2, and stored in the memory part 5 by the first controlpart 3.

TABLE 2 kind Priority A 3 B 3 C 3 D 2 E 3 Z 1 (2, 3)

In step S3, the first control part 3 judges the existence of theprocessing parts 11-17 which are not performing the process, when thepriority “1” is input to the input part 1 by the user. Since informationwhich shows a status of an operation of each of the processing parts11-17 is supplied to the second control part 7 at any time, and isstored for a predetermined time, the first control part 3 makes judgmentin step S3 by referring to the information stored in the second controlpart 7.

Additionally, as shown in the following table 3, the information whichshows the status of an operation of each of the processing parts 11-17is temporarily stored in the second control part 7 by being related tothe respective one of the processing parts, and is stored in the memorypart 5 by the first control part 3 if needed. It should be noted thatonly the information, which indicates the status of the operation withrespect to each of the first through sixth processing parts 11-16, isshown in table 3 for the sake of convenience.

TABLE 3 Proc. Status Re- Time Time to Failure part of maining after nextpro- No. process time repair check bability First In process 30 sec 100hrs 30 hrs 20% Second In process 60 sec 250 hrs 20 hrs 50% Third Failure 2 hrs 501 hrs 20 hrs 100%  Fourth Periodic  2 hrs 100 hrs 0 hr 20%check Fifth In process 50 sec 400 hrs 10 hrs 80% Sixth In process 30 sec250 hrs  5 hrs 50%

In the above table 3, the “remaining time” means a time needed tocomplete the present on-going process. With respect to a processing partwhich is under failure or being subjected to a periodic inspection orcheck, the “remaining time” means time until the processing part canresume the process processing about the processing part under failureand scheduled inspection. Additionally, the “time after repair” means alapsed time after returning from the last failure in the past. The “timeto next check” means a time to a next scheduled inspection definedaccording to the scheduled inspection interval defined beforehand.

Additionally, the “failure probability” is calculated by the formula of(“time after repair”/MTBF)×100(%). Here, “MTBF” means the mean timebetween failure of the processing parts 11-17. For example, supposingthis value is 500 hours, as shown in table 3, failure probability withrespect to each of the first through sixth processing parts 11-16 is setto 20%, 50%, 100% (when computed or more with 100, referred to as 100),20%, 80% and 50%, respectively. Therefore, the higher the failureprobability is, the more the failure occurs easily.

In step S3, when the first control part 3 judges, based on theinformation shown in FIG. 3, that there is a processing part which isnot performing a process, the routine proceeds to step S3 a. In step S3a, one of the processing parts which are not performing is selected, andthe routine proceeds to Step S4. In addition, when there are two or moreprocessing parts which are not performing a process, the processing partnearest to the stocker 23 is selected, i.e., the processing part withthe shortest conveyance time with respect to the stocker 23 is selected.On the other hand, when the first control part 3 judges, in step S3,that there is no processing part which is not performing a process, theroutine proceeds to step S3 b. In step S3 b, one of the processing partsis selected, and the routine proceeds to Step S4. It should be notedthat in the selection in the above-mentioned step S3 a and step S3 b,the first control part 3 may select a processing part having the minimumfailure probability by referring to the failure probability indicated inthe table 3.

Next, the first control part judges, in step S4, whether the time to thenext scheduled inspection with respect to the selected processing partis longer than mean processing time. The “mean processing time” is avalue which is obtained by dividing an accumulated processing time ofthe processing part by a number of wafers processed within theaccumulated process time. That is, the “mean processing time” means themean time of the processing time needed for processing a single wafer.Additionally, the “mean processing time” is calculated by the secondcontrol part 7 for each processing parts 11-17 whenever the wafer 25 isprocessed by the processing parts, and is retained in relation to theinformation of the table 3. If the control part 3 judges that the timeto the next scheduled inspection of the selected processing part islonger than the mean processing time, the routine proceeds to step S5 a.On the other hand, when the time to the next scheduled inspection isjudged to be shorter than the mean processing time, the routine proceedsto step S5 b.

Next, the first control part 3 judges, in step S5 a, whether the failureprobability of the selected processing part is within an allowable rangebased on the information shown in the above-mentioned table 3. If thevalue of, for example, 90% is set up beforehand as a degree ofpermission, of the failure probability and if the failure probabilitycalculated with respect to each of the processing parts exceeds 90%, theroutine proceeds to step S5 b. In step S5 a, the selected processingpart is removed from a selection candidate, and the routine returns toStep S3. On the other hand when the failure probability does not exceed90%, the routine proceeds to step S6. It should be noted that a warningmay be issued, in step S6, based on a warning threshold value which isset together with the above-mentioned allowable range. That is, when avalue of, for example, 70% is set to the warning threshold value, awarning may be issued so as to notify a user of a high probability offailure in a processing part having a failure probability of more than70%. This may be effective with respect to a prediction of failure.Additionally, the processing parts having the failure, probabilityexceeding the warning threshold value may be excluded from thecandidates of selection.

Next, the first control part 3 judges, in step S6, whether there is anywafer under conveyance to the selected processing part based on theinformation which shows the processing condition currently retained inthe second control part 7. If it is judged that there is a wafer underconveyance, the routine proceeds to step S7, otherwise, the routineproceeds to step S13. Here, in step S13, the wafer of kind Z is conveyedto the selected processing part.

In step S7, the first control part 3 judges whether or not the priorityof the wafer under conveyance is “1”. If it is judged that the priorityis “1”, the routine returns to Step S6. Accordingly, in this case, afterconveying the wafer having the priority of “1” to the processing part, anew wafer having the priority of “1” is subsequently conveyed to thesame processing part. On the other hand, if the first control part 3judges, in step S7, that the priority of the wafer under conveyance isnot “1”, the routine proceeds to step S8.

In step S8, the first control part 3 interrupts the process performed bythe selected processing part, and the driver 21 which received theinstruction from the first control part 3 moves the wafer in theselected processing part to the stocker 23. Then, the wafer of kind Zhaving the priority of “1” is conveyed to the selected processing partinstead of the wafer moved to the stocker 23. It should be noted thatthe wafer temporarily moved to the stocker 23 is processed at a toppriority by any one of the processing parts after the process applied tothe wafer of kind Z is completed.

If a notification is sent to the second control part 7 of failureoccurring in the processing part which has been selected as a processingpart to which the wafer is conveyed while the wafer of kind Z isconveyed, the first control part 3 stops the wafer under conveyance, orreturns the wafer to the stocker 23. In such a case, the routine returnsto step S3. It should be noted that the above-mentioned operation whenfailure occurs during the conveyance is similarly performed in theprocess described below.

The above is the operation when the priority of the wafer of kind Z isset to “1”. With reference to the priority shown in the above-mentionedtable 2, the wafers of kinds D, A, B, C, and E are supplied to theelected one of the processing parts 11-17 one by one.

On the other hand, when it is judged, in the above-mentioned step S2,that the priority of the wafer of kind Z is not “1”, the routineproceeds to step S10. It is judged, in step S10, by the first controlpart 3 whether the priority is “2”. If it is judged that priority is“2”, the routine proceeds to step S11. If it is judged that the priorityis not “2”, the routine proceeds to Step S14.

In step S11, the first control part 3 searches for the processing parts11-17 of which process will finish earliest based on the informationregarding the “remaining time” shown in the above-mentioned table 3.Then, in step S12, the first control part 3 judges appropriateness ofthe searched processing part. That is, in step S12, an operation of stepS4 through step S5 a, which is encircled by doted lines in FIG. 2 isperformed. Thereafter, if it is judged that the processing part is notappropriate, the processing part is excluded form the candidates ofselection, and the routine returns to step S11. On the other hand, if itis judged that the processing part is appropriate, the routine proceedsto step S13 so as to convey the wafer of kind Z to the selectedprocessing part.

As mentioned above, when priority of the wafer of kind Z is set to “2”,the wafer is supplied to the processing part selected in the mannermentioned above after the previously reserved wafer of kind D having thesame priority level is supplied to one of the processing parts. Itshould be noted that, in such as case, the process of the wafer of kindZ is performed by waiting completion of the on-going process performedby the selected processing part. Additionally, in this case, the wafersof kinds A, B, C, and E are supplied to the processing parts 11-17 oneby one.

On the other hand, if the priority of the wafer of kind Z is set to “3”,a process of step S14 and the subsequent steps is performed. That is, instep S14, the first control part 3 carries out the simulation of theprocessing situation in the future by referring to the “remaining time”shown in table 3 regarding the processes which have already beenperformed so as to calculate the schedule time at which the process ofthe wafer of kind Z can be started. Then, the first control part 3searches for the processing part, which can become available earlierthan the calculated scheduled time.

A description will now be given, of a method of calculating theabove-mentioned scheduled time. First, the first control part 3 holdsbeforehand as parameters a time needed to convey the wafer between thestocker 23 and each processing part 11-17, a time Tg needed for settingor resetting the wafer to each processing part 11-17 and a processingtime Tt corresponding to the contents of the process performed in eachprocessing part 11-17. It should be noted that the time needed to conveythe wafer from the stocker 23 to each processing part 11-16 isrepresented by a time Ta, Tb, Tc, Td, Te and Tf, respectively.

In order to start the process in the first processing part 11 shown inFIG. 1, the time (Ta+Tg) is needed. Similarly, in order to start theprocess in the second to sixth processing parts 12-16, the time (Tb+Tg),(Tc+Tg), (Td+Tg), (Te+Tg) and (Tf+Tg) are needed, respectively. Forexample, an ending time at which the wafer 25 returns to the stocker 23after the wafer 25 is immediately conveyed to and processed in the firstprocessing part 11 is calculated based on the going and returning timeto the processing part, the time required for setting and resetting thewafer and the time required for processing the wafer.

In the above-mentioned method, the ending time of the process for eachwafer of which process was reserved is calculated, and the processingparts are determined sequentially in accordance with the calculatedending time, and the scheduled time to start the process of the wafer ofkind Z is calculated by a simulation. It should be noted that when thepriority of the wafer of kind Z is set as “3”, the wafer of kind Dhaving the priority of “2” is first supplied to one of the processingparts 11-17. Thereafter, the wafers having the same priority “3” aresupplied to the processing parts 11-17 in an order of reservation. Thatis, the wafers of kinds A, B, C, E and Z are sequentially supplied tothe processing parts 11-17.

Thereafter, in step S15 the first control part 3 judges whether the turnthat the wafer of kind Z is processed has come. If it is judged thatturn has come, the routine proceeds to step S12.

It should be noted that the “remaining time” in table 3 means a periodto a time when the process can be resumed after the processing part isrepaired. A time required for performing the scheduled inspection isstored in the first control part 3 or the second control part 7, and thefirst control part 3 or the second control part 7 calculates the timerequired for performing the scheduled inspection by counting time from atime when the scheduled inspection is started.

Additionally, as mentioned above, the “remaining time” in the table 3with respect to the processing part under failure means a time until atime when the process is resumed after being repaired. The repair timecorresponding to each cause of failure is stored in the first controlpart 3 or the second control part 7 together with a failure number asshown in the following table 4.

TABLE 4 Failure No. Cause of failure Repair time 1 Conveyance system 10minutes failure (parameter abnormality) 2 Lamp failure 30 minutes 3Conveyance system 2 hours failure 4 Vacuum failure 5 hours . . . . . . .. .

It should be noted that the “conveyance system failure (parameterabnormality)” corresponding to the failure number 1 indicates a case inwhich an abnormality is detected in the conveyance system including theconveyance orbit 19 and the driver 21 when, for example, a sizedifferent from an actual size of the wafer to be conveyed is mistakenlyinput as a parameter by the user and the conveyance system is stopped.Additionally, the “lamp failure” corresponding to the failure number 2indicates a case in which a lamp, which is a consumable part, is blownoff and replacement is needed. Further, the “conveyance system failure”corresponding to the failure number 3 indicates a case in which a motorused in the conveyance system fails and replacement is needed. Further,the “vacuum failure” corresponding to the failure number 4 indicates acase in which a desired vacuum cannot be formed in a chamber provided inthe process part due to an abnormality in a vacuum pump and replacementof the vacuum pump is needed.

When failure occurs in a one of the processing parts 11-17, the secondcontrol part 7 notifies a user of failure generating in the processingpart through a monitor display etc. At this time, the user inputs thefailure number corresponding to the cause of the generated failure tothe input part 1. Accordingly, a repair time corresponding to the causeof the failure is read from the Table 4, and the “remaining time” iscalculated by counting the repair time by the first control part 3 orthe second control part 7.

Additionally, when judging whether or not the selected processing partis proper, the first control part 3 may further consider the reliabilityof each of the processing parts 11-17. That is, a reliance minimumcoefficient is previously obtained as a performance statistics valuewith respect to each of the processing parts 11-17, and a time obtainedby multiplying the above-mentioned mean time between failure by thereliability lower-limit coefficient is set as a minimum reliability atthe above-mentioned reliability level. The reliance minimum coefficientmeans a time which can guarantee a normal operation of the processingpart at least at the reliability level.

More specifically, supposing the mean failure interval time of theselected processing part is 200 hours and the reliance minimumcoefficient corresponding to a reliance level of 90% is 0.6, 120 hoursobtained by calculating 200×0.6 correspond to a reliance minimum of 90%with respect to the mean failure interval time (200 hours). If it isjudged by the first control part 3 that the thus-obtained relianceminimum is below a minimum value, the processing part may be excludedfrom the candidates of selection.

Additionally, the semiconductor integrated circuit manufacturing systemshown in FIG. 1 may have a function to calculate a time of ending thewhole or a predetermined process in accordance with a supply reservationtime input by a user to the input part 1. Further, the semiconductorintegrated circuit manufacturing system may have a function to calculateand display a time to supply a predetermined wafer in accordance with adesired ending time input by a user to the input part 1, and accept areservation made by the user who made a determination by observing thedisplay.

A description will now be given, with reference to a flowchart of FIG.3, of an operation which realizes the above-mentioned function of thesemiconductor integrated circuit manufacturing system shown in FIG. 1.First, in step S21, the user judges whether or not a process of thewafer by supplying to a processing part is to be reserved. When thereservation is to be made, the routine proceeds to step S22 a. On theother hand, when no reservation is to be made, the routine proceeds tostep S22 b. Then, the user judges, in step S22 b, whether or not a timeof ending is to be calculated. When the time of ending is to becalculated, the routine proceeds to step S22 a. When the time of endingis not to be calculated end time, the routine proceeds to step S30.

In step S22 a, the user inputs to the input part 1 a desired time tosupply a wafer. Then, in step S23, the priority regarding the reservedwafer, which is shown in table 1, is referred to by the first controlpart 3, and an order of processing of the newly supplied wafer isdetermined. It should be noted that in the determined order, a waferhaving a higher priority is put in a higher position, and wafers havingthe same priority are put in a reserved order.

In step S24, a simulation of the process to be applied to the reservedwafer is performed while the first control part 3 checks the processingsituation of each of the processing parts 11-17 and judging theappropriateness. Specifically, the simulation of the process is carriedout in the order determined in step S23. The process of step S4, step S5a and step S5 b shown in FIG. 2 is performed in the simulation. That is,after the process of each wafer is finished in the simulation, eachinformation which shows the processing situation shown in theabove-mentioned table 3 is computed virtually, and the process of stepS4, step S5 a and S5 b shown in FIG. 2 is performed. As mentioned above,the first control part 3 judges the appropriateness of each processingpart on the basis of the information computed virtually, and determinesthe processing part to which the wafer to be processed next is supplied.

In step S25, in the simulation, the wafer newly made as an object forreservation is supplied to one of the processing parts, which willbecome available at a time close to the above-mentioned desired time tosupply the wafer, and the time of ending the process applied to thewafer is calculated. At the same time, a time at which the processapplied to all of the reserved wafers is calculated. It should be notedthat measure for the end time of the process can be provided to the userby displaying the calculated time on a display provided in the secondcontrol part.

Next, in step S26, the first control part 3 judges whether the new waferis reserved. If it is judged that it is reserved, the routine proceedsto step S27. If it is judged that it is not reserved, the routineproceeds to step S33 mentioned later. In step S27, the reserved wafer issequentially conveyed to the processing parts in the order determinedaccording to the priority, and the desired process is performed.

On the other hand, in step S30, a desired time of ending the processapplied to the wafer to be newly reserved or the time of ending theprocess applied to all wafers is supplied to the input part 1 by theuser. Then, in step S31, the simulation of the process in eachprocessing part is carried out by the first control part 3 as mentionedabove, and the time at which the newly reserved wafer is supplied byreverse calculating based on the desired end time. It should be notedthat the time of supply is calculated based on each priority level ofthe wafer to be newly reserved.

The user is notified of the thus-calculated time to supply by beingdisplayed on a monitor provided in the second control part 7.Accordingly, the user determines in step S33 whether to reserve thesupply of the new wafer. If the reservation is to be made, the routineproceeds to step S27 after completing the reservation. If thereservation is tot needed, the routine is ended.

According to the above-mentioned operation of the semiconductorintegrated circuit manufacturing system shown in FIG. 1, the bestprocess according to the situation of each of the processing parts 11-17is performed for every wafer, thereby increasing the manufacturingefficiency of a semiconductor integrated circuit. Additionally, sincethe simulation of wafer processing is performed as mentioned aboveaccording to a user's needs, manufacture of semiconductor integratedcircuits can be performed schematically.

On the other hand, it is useful to construct a production managementsystem having a plurality of semiconductor integrated circuitmanufacturing systems connected in parallel to an upper productionmanagement controller 30 as shown in FIG. 4. That is, as shown in FIG.4, in the production management system, the first control part 3provided in each semiconductor integrated circuit manufacturing systemis connected to the production management controller 30, respectively.It should be noted that, in FIG. 4, the illustration regarding otherportions of the semiconductor integrated circuit manufacture systemshown in FIG. 1 is omitted.

Additionally, the plurality of the above-mentioned semiconductorintegrated circuit manufacturing systems may be perform differentprocesses from each other. Further, a plurality of semiconductorintegrated circuit manufacturing systems may constitute a plurality ofgroups, which perform different processes. That is, for example, in acase in which the first through sixth processing parts 11-16 shown inFIG. 1 are etchers which perform etching processes, the first processingpart 11 may be set as a first group in which a kind of gas and atemperature and a pressure of the gas are set in a first condition; thesecond processing part 12 and the third processing part 13 are set as asecond group in which a second condition is set; and the fourth throughsixth processing parts 14-16 are set as a third group in which a thirdcondition is set. In this production management system, information issupplied to the first control part 3 of each of the processing partsthrough the production management controller 30, which manages theplurality of semiconductor integrated circuit manufacturing systems.

A description will now be given, with reference to flow charts of FIGS.5 to 7, of an operation of such a production management system. First,the production management controller 30 retains data indicating thecontents of a process performed in relation to each of the semiconductorintegrated circuit manufacturing systems. Then, when an instruction ofthe contents of the process to be performed is sent by the user, theproduction management controller 30 selects one of the semiconductorintegrated circuit manufacturing systems which can realize the process.Thus, the production management controller 30 supplies the data whichrepresents the contents of the process to the first control part 3provided in the selected one of the semiconductor integrated circuitmanufacturing systems. It should be noted that the data which representsthe contents of such process may be directly supplied to the input part1 of the selected one of the semiconductor integrated circuitmanufacture systems according to the judgment by the user.

In step S41, the first control part 3 selects one of the above-mentionedgroups set to perform the designated process. Then, in step S42, Thefirst control part 3 judges whether or not all the processing partscontained in the selected one of the groups are performing processes. Ifit is judged that all the processing parts contained in the selected oneof the groups are performing the process, the routine proceeds to a partA in the flowchart of FIG. 5. On the other hand, if it is judged that atleast one processing part contained in the selected group is notperforming the process, the routine proceeds to step S43. It should benoted that a process of the part A part and a process of a part C shownin FIG. 5 will be described later.

In step S43, the first control part 3 selects, as candidates forselection, all the processing parts that are not under processing fromamong the processing parts which can be selected. Then, in step S44, thefirst control part 3 accesses the second control part 7 and refers to a“time to the next scheduled inspection” for each processing part set asa candidate for selection, and judges whether or not the “time to thenext scheduled inspection” has reached an allowable value. It should benoted that the judgment whether or not the “time to the next scheduledinspection” has reached the allowable value may be made at a time whenthe process applied to the newly supplied wafer is ended.

Then, with respect to the processing parts of which “time to the nextscheduled inspection” is judged to have reached the allowable value, theroutine proceeds to step S45 b. On the other hand, the routine proceedsto step S45 a with respect to the processing parts of which “time to thenext scheduled inspection” is judged not to have reached the allowablevalue. In step S45 b, a flag contained in the first control part 3 orthe second control part 7 is raised so as to exclude the processing partfrom the candidates for selection, and the routine returns to step S43.

On the other hand, in step S45 a, the first control part 3 accesses thesecond control part 7 and refers to a “failure probability” for eachprocessing part set as a candidate for selection, and judges whether ornot the “failure probability” has reached an allowable value. It shouldbe noted that the judgment whether or not the “failure probability” hasreached the allowable value may be made at a time when the processapplied to the newly supplied wafer is ended.

Then, with respect to the processing parts of which “failureprobability” is judged to have reached the allowable value, the routineproceeds to step S46 b. On the other hand, the routine proceeds to stepS46 a with respect to the processing parts of which “failureprobability” is judged not to have reached the allowable value. In stepS46 b, a flag contained in the first control part 3 or the secondcontrol part 7 is raised so as to exclude the processing part from thecandidates for selection, and the routine returns to step S43.

In step S46 a, the first control part 3 selects one of the processingparts, which are the candidates for selection, having a shortestconveyance time, and sends an instruction to the driver 21 and thesecond control part 7 to convey the wafer to the selected one of theprocessing parts and process the wafer in the selected one of theprocessing parts.

On the other band, if it is judged, in step S42, that all the processingparts contained in the group selected in step S42 are performing aprocess, the routine proceeds to step S50 shown in FIG. 6. In step S50,the first control part 3 accesses the second control part 7 and refersto a “remaining time” for each processing part contained in the selectedgroup, and judges whether or not the “remaining time” exceeds theconveyance time of the processing part for all the processing partscontained in the selected group. Then, if it is judged that the“remaining time” exceeds the conveyance time, the routine proceeds tostep S51. On the other hand, if it is judged that the “remaining time”does not exceed the conveyance time, the routine proceeds to a part Bshown in FIG. 6. A process of the part B will be described later.

In step S51, the first control part 3 accesses the second control part 7and refers to the “time to the next scheduled inspection” for eachprocessing part contained in the selected group, and judges whether ornot the “time to the next scheduled inspection” will reach apredetermined allowable value when the new wafer is supplied. It shouldbe noted that the judgment whether or not the “time to the nextscheduled inspection” will reach the allowable value may be made at atime when the process applied to the newly supplied wafer is ended.

Then, with respect to the processing parts of which “time to the nextscheduled inspection” is judged to reach the allowable value, theroutine proceeds to step S52 b. On the other hand, the routine proceedsto step S52 a with respect to the processing parts of which “time to thenext scheduled inspection” is judged not to reach the allowable value.In step S52 b, a flag contained in the first control part 3 or thesecond control part 7 is raised so as to exclude the processing partfrom the candidates for selection, and the routine returns to step S51.

On the other hand, in step S52 a, the first control part 3 accesses thesecond control part 7 and refers to the “failure probability” for eachprocessing part contained in the selected group, and judges whether ornot the “failure probability” will reach an allowable value. It shouldbe noted that the judgment whether or not the “failure probability” willreach the allowable value may be made at a time when the process appliedto the newly supplied wafer is ended.

Then, with respect to the processing parts of which “failureprobability” is judged to reach the allowable value, the routineproceeds to step S53 b. On the other hand, the routine proceeds to stepS53 a with respect to the processing parts of which “failureprobability” is judged not to reach the allowable value. In step S53 b,a flag contained in the first control part 3 or the second control part7 is raised so as to exclude the processing part from the candidates forselection, and the routine returns to step S51.

In step S53 a, the first control part 3 selects one of the processingparts, which are the candidates for selection, having a shortestconveyance time, and sends an instruction to the driver 21 and thesecond control part 7 to convey the wafer to the selected one of theprocessing parts and process the wafer in the selected one of theprocessing parts.

On the other hand, if it is judged, in step S50, that the “remainingtime” of at least one of the processing parts contained in the selectedgroup is judged to be less than the conveyance time to the processingpart, the routine proceeds to step S60 shown in FIG. 7. In step S60, thefirst control part 3 performs the above-mentioned simulation so as tojudge whether or not a time when the process is started by changing aprocess recipe is earlier than a time when the conveyance is completedwith respect to the processing parts of which process is completed priorto the conveyance of the wafer. Then, if it is judged that such aprocessing part is not present, the routine proceeds to step S61 b so asto select another group by the first control part 3, and the routinereturns to step S42.

On the other hand, if it is judged that there is a processing part ofwhich time when the process can be started by changing a process recipeis earlier than a time when the conveyance is completed, the routineproceeds to step S61 a. In step S61 a, the first control part 3 accessesthe second control part 7 and refers to the “time to the next scheduledinspection” for each processing part contained in the selected group,and judges whether or not the “time to the next scheduled inspection”will reach a predetermined allowable value when the new wafer issupplied. It should be noted that the judgment whether or not the “timeto the next scheduled inspection” will reach the allowable value may bemade at a time when the process applied to the newly supplied wafer isended.

Then, with respect to the processing part of which “time to the nextscheduled inspection” is judged to reach the allowable value, theroutine proceeds to step S62 b. On the other hand, the routine proceedsto step S62 a with respect to the processing part of which “time to thenext scheduled inspection” is judged not to reach the allowable value.In step S62 b, a flag contained in the first control part 3 or thesecond control part 7 is raised so as to exclude the processing partfrom the candidates for selection, and the routine returns to step S61a.

On the other hand, in step S62 a, the first control part 3 accesses thesecond control part 7 and refers to the “failure probability” for theprocessing part, and judges whether or not the “failure probability”will reach a predetermined allowable value when the new wafer issupplied. It should be noted that the judgment whether or not the“failure probability” will reach the allowable value may be made at atime when the process applied to the newly supplied wafer is ended.

Then, with respect to the processing part of which “failure probability”is judged to reach the allowable value, the routine proceeds to step S63b. On the other hand, the routine proceeds to step S63 a with respect tothe processing part of which “failure probability” is judged not toreach the allowable value. In step S63 b, a flag contained in the firstcontrol part 3 or the second control part 7 is raised so as to excludethe processing part from the candidates for selection, and the routinereturns to step S61 a.

In step S63 a, the first control part 3 selects one of the processingparts having a shortest conveyance time, and sends an instruction to thedriver 21 and the second control part 7 to convey the wafer to theselected one of the processing parts and process the wafer in theselected one of the processing parts.

As mentioned above, an efficient manufacture of a semiconductorintegrated circuit is realizable by efficiently controlling a pluralityof semiconductor integrated circuit manufacturing systems by theproduction control controller 30 shown in FIG. 4. It should be notedthat if the wafer is conveyed between the plurality of semiconductorintegrated circuit manufacturing systems in the production managementsystem shown in FIG. 4, a plurality of processes can be efficientlyperformed in different semiconductor integrated circuit manufacturingsystems.

Additionally, the above-mentioned operation of the semiconductorintegrated circuit manufacturing system or the production managementsystem including a plurality of semiconductor integrated circuitmanufacturing systems can be described by programs stored in acomputer-readable recording medium such as a floppy disk (FD), a CD-ROMor a DVD-ROM. That is, as shown in FIG. 8, the recording medium such as,for example, a CD-ROM 40 is attached to a computer 42 which constitutesthe process control unit 10 shown in FIG. 1 or the production managementcontroller 30 shown in FIG. 4 so that the computer executes the programsrecorded on the recording medium so as to perform the above-mentionedoperations. The computer may be provided with a display 42 a, whichdisplays information presented to the user, and a keyboard device 42 b,which corresponds to the input part 1 shown in FIG. 1.

The present invention is not limited to the specifically disclosedembodiments, and variations and modifications may be made withoutdeparting from the scope of the present invention.

1. A semiconductor manufacturing system having a processing apparatusfor applying a process to a plurality of semiconductor substrates,comprising: a memory part that stores priority-level data whichindicates a priority level of a process to be applied to each of saidplurality of semiconductor substrates on an individual semiconductorsubstrate basis; and a control part which controls said processingapparatus to process a newly supplied semiconductor substrate bydetermining an order of processing said plurality of semiconductorsubstrates being supplied to said processing apparatus based on acomparison of new priority-level data given to said newly suppliedsemiconductor substrate with said priority-level data stored in saidmemory part with respect to said plurality of semiconductor substratesso as to change a previously determined order of processing saidplurality of semiconductor substrates in accordance with said newpriority-level data.
 2. The semiconductor manufacturing system asclaimed in claim 1, wherein said control part calculates a time ofending a process being applied to said newly supplied semiconductorsubstrate to which said new priority-level data is given or a processfor all of said plurality of semiconductor substrates.
 3. Thesemiconductor manufacturing system as claimed in claim 1, wherein saidcontrol part calculates, based on a simulation of an operation of saidprocessing apparatus, a time of supplying said newly suppliedsemiconductor substrate to which said new priority-level data is givento said processing apparatus in response to a time of ending a processdesignated by a user so as to end a process applied to said newlysupplied semiconductor substrate to which said new priority-level datais given or all of said plurality of semiconductor substrates.
 4. Thesemiconductor manufacturing system as claimed in claim 1, wherein aplurality of processing apparatuses including said processing apparatusare provided and are controlled by said control part; wherein amonitoring part monitors a condition of a process being performed byeach of said plurality of processing apparatuses; and wherein saidcontrol part selects one of said plurality of processing apparatuseswhich applies a process to said newly supplied semiconductor substrateto which said new priority-level data is given in response to saidcondition of this process being performed by each of said plurality ofprocessing apparatuses.
 5. The semiconductor manufacturing system asclaimed in claim 4, wherein said control part calculates a time ofending the process being applied to said newly supplied semiconductorsubstrate to which said new priority-level data is given or the processfor all of the semiconductor substrates.
 6. The semiconductormanufacturing system as claimed in claim 4, wherein said control partcalculates, based on a simulation of an operation of one of saidplurality of processing apparatuses, a time of supplying said newlysupplied semiconductor substrate to which said new priority-level datais given to said processing apparatus in response to a time of ending aprocess designated by a user so as to end the process applied to saidnewly supplied semiconductor substrate to which said new priority-leveldata is given or all of said plurality of semiconductor substrates. 7.The semiconductor manufacturing system as claimed in claim 4, whereinsaid monitoring part monitors a remaining time for each of saidplurality of processing apparatuses, said remaining time being a timeuntil a process currently being applied is ended; and wherein saidcontrol part selects one of said plurality of processing apparatuseswhich applies the process to said newly supplied semiconductor substrateto which said new priority-level data is given in accordance with saidremaining time.
 8. The semiconductor manufacturing system as claimed inclaim 4, wherein said monitoring part monitors a time remaining forperforming a next periodic inspection for each of said plurality ofprocessing apparatuses; and wherein said control part selects one ofsaid plurality of processing apparatuses which applies the process tosaid newly supplied semiconductor substrate to which said newpriority-level data is given in accordance with said time remaining forperforming said next periodic inspection.
 9. The semiconductormanufacturing system as claimed in claim 1, wherein said newly suppliedsemiconductor substrate is one of said plurality of semiconductorsubstrates of which order of processing has been scheduled so that apreviously scheduled order of processing is changed in accordance withsaid new priority-level data.
 10. The semiconductor manufacturing systemas claimed in claim 1, wherein said newly supplied semiconductorsubstrate is a semiconductor substrate other than said plurality ofsemiconductor substrates of which order of processing has been scheduledso that a previously scheduled order of processing is changed inaccordance with said new priority-level data.
 11. A control method of asemiconductor manufacturing system having a processing apparatus whichapplies a process to a plurality of semiconductor substrates,comprising: storing priority-level data in a memory part which indicatesa priority level of the process to be applied to each of said pluralityof semiconductor substrates on an individual semiconductor substratebasis; determining an order of processing a newly supplied semiconductorsubstrate being supplied to said processing apparatus based on acomparison of new priority-level data given to said newly suppliedsemiconductor substrate with said priority-level data stored in saidmemory part with respect to said plurality of semiconductor substratesso as to change a previously determined order of processing saidplurality of semiconductor substrates in accordance with said newpriority-level data; and causing said processing apparatus to apply theprocess to said newly supplied semiconductor substrate.
 12. A controlmethod of a semiconductor manufacturing system having a plurality ofprocessing apparatuses which apply a plurality of processes tosemiconductor substrates, comprising: storing priority-level data in amemory part, which indicates a priority level of a process to be appliedto each of said semiconductor substrates on an individual semiconductorsubstrate basis; monitoring a condition of a process in each of saidprocessing apparatuses; determining an order of processing a newlysupplied semiconductor substrate being supplied to one of saidprocessing apparatuses based on a comparison of new priority-level datagiven to said newly supplied semiconductor substrate with saidpriority-level data stored in said memory part with respect to saidsemiconductor substrates so as to change a previously determined orderof processing said semiconductor substrates in accordance with said newpriority-level data; selecting one of said processing apparatuses whichapplies the process to said newly supplied semiconductor substrate inaccordance with said condition of the process and said order ofprocessing; and causing said processing apparatus to apply the processto said newly supplied semiconductor substrate.
 13. A computer-readablerecording medium storing program code for causing a computer to controla process applied to a plurality of semiconductor substrates,comprising: first program code means for storing priority-level datawhich indicates a priority level of a process to be applied to each ofsaid plurality of semiconductor substrates on an individualsemiconductor substrate basis; second program code means for comparingnew priority-level data with said stored priority-level data withrespect to said plurality of semiconductor substrates of which processhas been scheduled, said new priority-level data being supplied inresponse to a newly supplied semiconductor substrate being supplied to aprocessing apparatus; third program code means for determining an orderof processing said newly supplied semiconductor substrate being suppliedto said processing apparatus while changing a previously determinedorder of processing said plurality of semiconductor substrates; andfourth program code means for causing said processing apparatus to applythe process to said newly supplied semiconductor substrate.
 14. Thecomputer-readable recording medium as claimed in claim 13, furthercomprising: fifth program code means for calculating a time of endingthe process being applied to said newly supplied semiconductor substrateor a process for all of said plurality of semiconductor substrates. 15.The computer-readable recording medium as claimed in claim 13, furthercomprising: fifth program code means for calculating, based on asimulation of an operation of said processing apparatus, a time ofsupplying said newly supplied semiconductor substrate to said processingapparatus in response to a time of ending a process designated by a userso as to end the process applied to said newly supplied semiconductorsubstrate or all of said plurality of semiconductor substrates.
 16. Acomputer-readable recording medium storing program code for causing acomputer to control a process applied to a plurality of semiconductorsubstrates by a plurality of processing apparatuses, comprising: firstprogram code means for storing priority-level data which indicates apriority level of a process to be applied to each of said plurality ofsemiconductor substrates on an individual semiconductor substrate basis;second program code means for monitoring a condition of a process ineach of said plurality of processing apparatuses; third program codemeans for comparing new priority-level data with said storedpriority-level data with respect to said plurality of semiconductorsubstrates of which process has been scheduled, new priority-level databeing supplied in response to a newly supplied semiconductor substrateto which a process is applied; fourth program code means for determiningan order of processing said newly supplied semiconductor substrate beingsupplied to one of said plurality of processing apparatuses; filthprogram code means for selecting said one of said plurality ofprocessing apparatuses which applies a process to said newly suppliedsemiconductor substrate in accordance with said condition of theprocess; and sixth program code means for causing said selected one ofsaid processing apparatuses to apply the process to said newly suppliedsemiconductor substrate; wherein the program code changes a previouslydetermined order of processing semiconductor substrates in accordancewith said new priority level data.
 17. The computer-readable recordingmedium as claimed in claim 16, further comprising: seventh program codemeans for calculating a time of ending the process being applied to saidnewly supplied semiconductor substrate or a process for all of saidplurality of semiconductor substrates.
 18. The computer-readablerecording medium as claimed in claim 16, further comprising: seventhprogram code means for calculating, based on a simulation of anoperation of one of said plurality of processing apparatuses, a time ofsupplying said newly supplied semiconductor substrate to said one ofsaid plurality of processing apparatuses in response to a time of endinga process designated by a user so as to end the process applied to saidnewly supplied semiconductor substrate or all of said plurality ofsemiconductor substrates.
 19. The computer-readable recording medium asclaimed in claim 16, further comprising: seventh program code means formonitoring a remaining time for each of said plurality of processingapparatuses, said remaining time being a time until the processcurrently being applied is ended; and eighth program code means forselecting one of said plurality of processing apparatuses which appliesthe process to said newly supplied semiconductor substrate in accordancewith said remaining time.
 20. The computer-readable recording medium asclaimed in claim 16, further comprising: seventh program code means forcausing monitoring a time remaining for performing a next periodicinspection for each of said plurality of processing apparatuses; andeighth program code means for selecting said one of said plurality ofprocessing apparatuses which applies the process to said newly suppliedsemiconductor substrate in accordance with said time remaining forperforming said next periodic inspection.
 21. A semiconductormanufacturing system having a processing apparatus for applying aprocess to semiconductor substrates; wherein a memory part storespriority-level data which indicates a priority level of a process to beapplied to each of said semiconductor substrates on an individualsemiconductor substrate basis; wherein a control part controls saidprocessing apparatus to apply a process to a newly supplied one of saidsemiconductor substrates by determining an order of processing saidnewly supplied one of said semiconductor substrates being supplied tosaid processing apparatus based on a comparison of new priority-leveldata with said priority-level data stored in said memory part withrespect to said semiconductor substrates of which process has beenscheduled, said new priority-level data being supplied in response tosaid newly supplied one of said semiconductor substrates being suppliedto said processing apparatus; wherein said control part calculates atime of ending a process being applied to said newly supplied one ofsaid semiconductor substrates or a time of ending a process for all ofsaid semiconductor substrates; and wherein said memory part storesinformation regarding kinds of failure possibly occurring in saidprocessing apparatus and a repair time needed for repairing saidprocessing apparatus in response to each kind of failure; and when afailure occurs in processing apparatuses, said control part calculates atime of ending a process in accordance with said repair time read fromsaid memory part in response to a kind of failure designated by a user.22. A semiconductor manufacturing system having a processing apparatusfor applying a process to semiconductor substrates; wherein a memorypart stores priority-level data which indicates a priority level of aprocess to be applied to each of said semiconductor substrates on anindividual semiconductor substrate basis; wherein a control partcontrols said processing apparatus to apply a process to a newlysupplied one of said semiconductor substrates by determining an order ofprocessing said newly supplied one of said semiconductor substratesbeing supplied to said processing apparatus based on a comparison of newpriority-level data with said priority-level data stored in said memorypart with respect to said semiconductor substrates of which process hasbeen scheduled, said new priority-level data being supplied in responseto said newly supplied one of said semiconductor substrates beingsupplied to said processing apparatus; wherein a plurality of processingapparatuses are controlled by said control part; wherein a monitoringpart monitors a condition of a process being performed by each of saidplurality of processing apparatuses; wherein said control part selectsone of said plurality of processing apparatuses which applies theprocess to said newly supplied one of said semiconductor substrates inresponse to a condition of the process being performed by each of saidplurality of processing apparatuses; wherein said control partcalculates a time of ending the process being applied to said newlysupplied one of said semiconductor substrates or a time of ending aprocess for all of said semiconductor substrates; and wherein saidmemory part stores information regarding kinds of failure possiblyoccurring in said processing apparatus and a repair time needed forrepairing said processing apparatus in response to each of said kinds offailure; and when a failure occurs in said processing apparatus, saidcontrol part calculates a time of ending a process in accordance withsaid repair time read from said memory part in response to a kind offailure designated by a user.
 23. A semiconductor manufacturing systemhaving at least one processing apparatus for applying a process tosemiconductor substrates; wherein a memory part stores priority-leveldata which indicates a priority level of a process to be applied to eachof said semiconductor substrates on an individual semiconductorsubstrate basis; wherein a control part controls a processing apparatusto apply a process to a newly supplied one of said semiconductorsubstrates by determining an order of processing said newly supplied oneof said semiconductor substrates being supplied to said processingapparatus based on a comparison of new priority-level data with saidpriority-level data stored in said memory part with respect to saidsemiconductor substrates of which process has been scheduled, said newpriority-level data being supplied in response to said newly suppliedone of said semiconductor substrates being supplied to said processingapparatus; wherein a plurality of processing apparatuses are controlledby said control part; wherein a monitoring part monitors a condition ofa process being performed by each of said plurality of processingapparatuses; wherein said control part selects one of said plurality ofprocessing apparatuses which applies the process to said newly suppliedone of said semiconductor substrates in response to said condition ofthe process being performed by each of said plurality of processingapparatuses; and wherein said monitoring part monitors a continuousoperating time for each of said plurality of processing apparatuses; andwherein said control part selects one of said plurality of processingapparatuses which applies the process to said newly supplied one of saidsemiconductor substrates by referring to a failure occurring ratecalculated for each of said plurality of processing apparatuses inaccordance with said continuous operating time.
 24. A computer-readablerecording medium storing program code for causing a computer to controla process applied to semiconductor substrates, comprising: first programcode means for storing priority-level data which indicates a prioritylevel of a process to be applied to each of said semiconductorsubstrates on an individual semiconductor substrate basis; secondprogram code means for comparing new priority-level data with previousstored priority-level data with respect to said semiconductor substratesof which process has been scheduled, said new priority-level data beingsupplied in response to a newly supplied one of said semiconductorsubstrates being supplied to a processing apparatus; third program codemeans for determining an order of processing said newly supplied one ofsaid semiconductor substrates being supplied to said processingapparatus; fourth program code means for causing said processingapparatus to apply a process to said newly supplied one of saidsemiconductor substrates; fifth program code means for calculating atime of ending the process being applied to said newly supplied one ofsaid semiconductor substrates or a time of ending a process for all ofsaid semiconductor substrates; and sixth program code means for storinginformation regarding kinds of failure possibly occurring in saidprocessing apparatus and a repair time needed for repairing saidprocessing apparatus in response to each of said kinds of failure; andseventh program code means, when a failure occurs in said processingapparatus, for calculating a time of ending a process in accordance withsaid repair time which is read in response to a kind of failuredesignated by a user.
 25. A computer-readable recording medium storingprogram code for causing a computer to control a process applied tosemiconductor substrates by a plurality of processing apparatuses,comprising: first program code means for storing priority-level datawhich indicates a priority level of a process to be applied to each ofsaid semiconductor substrates on an individual semiconductor substratebasis; second program code means for monitoring a condition of a processin each of said plurality of processing apparatuses; third program codemeans for comparing new priority-level data with a previously storedpriority-level data with respect to said semiconductor substrates ofwhich process has been scheduled, said new priority-level data beingsupplied in response to a newly supplied one of said semiconductorsubstrates to which a process is applied; fourth program code means fordetermining an order of processing said newly supplied one of saidsemiconductor substrates being supplied to said plurality of processingapparatuses; fifth program code means for selecting one of saidplurality of processing apparatuses which applies a process to saidnewly supplied one of said semiconductor substrates in accordance withsaid condition of the process; sixth program code means for causing saidselected one of said plurality of processing apparatuses to apply theprocess to said newly supplied one of said semiconductor substrates;seventh program code means for calculating a time of ending the processbeing applied to said newly supplied one of said semiconductorsubstrates or a time of ending a process for all of said semiconductorsubstrates; eighth program code means for storing information regardingkinds of failure possibly occurring in a processing apparatus and arepair time needed for repairing said processing apparatus in responseto each of said kinds of failure; and ninth program code means, when afailure occurs in said processing apparatus, for calculating a time ofending a process in accordance with said repair time which is read inresponse to a kind of failure designated by a user.
 26. Acomputer-readable recording medium storing program code for causing acomputer to control a process applied to semiconductor substrates by aplurality of processing apparatuses, comprising: first program codemeans for storing priority-level data which indicates a priority levelof a process to be applied to each of said semiconductor substrates onan individual semiconductor substrate basis; second program code meansfor monitoring a condition of a process in each of said plurality ofprocessing apparatuses; third program code means for comparing newpriority-level data with a previously stored priority-level data withrespect to said semiconductor substrates of which process has beenscheduled, said new priority-level data being supplied in response to anewly supplied one of said semiconductor substrates to which a processis applied; fourth program code means for determining an order ofprocessing said newly supplied one of said semiconductor substratesbeing supplied to said plurality of processing apparatuses; fifthprogram code means for selecting one of said plurality of processingapparatuses which applies a process to said newly supplied one of saidsemiconductor substrates in accordance with said condition of theprocess; sixth program code means for causing said selected one of saidplurality of processing apparatuses to apply the process to said newlysupplied one of said semiconductor substrates; seventh program codemeans for monitoring a continuous operating time for each of saidplurality of processing apparatuses; and eighth program code means forselecting one of said plurality of processing apparatuses which appliesthe process to said newly supplied one of said semiconductor substratesby referring to a failure occurring rate calculated for each of saidplurality of processing apparatuses in accordance with said continuousoperating time.